This process creates hills and valleys on the surface of the wafer so that the sunlight gets reflected rather than trapped. Wafers run through a cascading rinsing process called ETCHING. It starts with a KOH rinse followed by HF,HNO3 and Additives. The wafers are rinsed with DI (deionized water) which is the purest form of water, with the mobility of electrons.
To establish a separation of the photo-generated charge carriers, the solar cell needs a p/n-junction. For p-type based
solar cells, this is realized by an n-type emitter. The dopant is
Phosphorus (P), coming from a liquid (POCl3) source. The
dopant is diffused into the silicon by a combined oxidation /
heat treatment in the POCl3 diffusion system.
Edge Isolation – The diffusion process also results in N-layer being formed on the edges which results into shorting
between P and N region from the edge of solar cells. If
shorting is not removed, the unwanted current will flow which will result in shunted cells. The Edge Isolation process isolates the junction from the edges by doing etching to some micron using HF and HNO3 chemical.
PSG Removal – During Emitter diffusion, an oxide is built on
the wafer surface made up of high concentrations of
Phosphorous, thus being called phosphorous silicate glass
(PSG). The layer thickness depends on the diffusion
parameters and may vary between 20 and 50 nm. The PSG
needs to be removed before silicon nitride deposition,
because it lacks appropriate refractive index and has a poor
surface passivation. Thus PSG Removal is done.
The etching of the PSG is a very stable process, as the PSG
itself is etched very fast in diluted hydrofluoric (HF) acid, the bare silicon has a very slow etch speed. So even if the wafers are still in the HF solution after PSG is removed there is only a minor risk of etching back the emitter. Thus, the only parameters that influence the PSG removal itself are the HF concentration and the etch time.
Anti PID unit – SiO2 layer produced in the process of
ozonation. The silicon oxide layer is produced between the
silicon substrate and silicon nitride. Due to strong oxidation
power of ozone, when the silicon substrate is oxidized with
ozone, the bottom surface of the silicon layer of the silicon
oxide layer can be generated quickly, that is adding an
additional SiO2 dielectric layer between emitter and Anti
reflecting coating by inline ozone generator .The SiO2 films
grown by ozone, though only having a thickness of 1–2 nm,
still shows a good stability in PID. This thin layer of SiO2 is
confirmed through water drop test as it’s hydrophilic in nature. Thus, SiO2 dielectric layer ensures excellent PID.
Plasma Enhanced Chemical Vapour Deposition
In this step, an anti-reflective coating is put on the wafer to
ensure minimum reflection of the sunlight.
Once the wafer gets blue color, after PECVD, they go through printing cycle. Electrical contacts are applied to the front and
back side of processed wafer, which renders the functionality
of solar cell. This is carried out by deposition of metal paste
The front contact must penetrate the antireflective coating
(ARC) and contact the emitter near the highly doped surface
in order to get low contact resistance. On the rear side at the
aluminum silicon interface a melt is produced and during
cooling down a highly aluminum doped layer is crystallized.
In the final step the cells are tested and sorted according to
their electrical, EL and optical quality. In cell tester unit all the electrical parameters of the solar cells like efficiency, short circuit current, open circuit voltage, fill factor, shunt resistance, series resistance etc are measured and then the cells are sorted in to the different bins according to their efficiency, EL and optical quality into 48 different classes.
Optimum space utilization for per MW cell production
Flexibility to accommodate New Technology
Inline integrated quality control and monitoring
Highly safe operating conditions through automated Chemical Dosing System (CDS)
Automated cell sorting into 48 separate bins based on current
100 % Inline EL inspection at cell level
Optimum cell design and printing
PID resistive Capability and predictable degradation
Single cell traceability
We at Jupiter believe in producing highly reliable and high quality solar cells in our plants. We carry out various additional tests and different stages of manufacturing to ensure that our products meet the international standards.
We are highly focused on ensuring Quality and Reliability of the products, and have established in-house facilities and expertise for this purpose. Cells are tested at every stage, right from change in design, to manufacturing process, to simulation for outdoor performance.
For rear and front bus bar
To check Al stability towards moisture
To check the Al adhesion
Stringent quality checks at every stage of the manufacturing process ensure that our products surpass International Standards.
To measure the reflectivity of Raw wafer, Textured and ARC coated wafer sample.
Bulk resistivity of raw wafers and sheet resistance after diffusion process.
Minority carrier lifetime measurement at all stages
To measure the thickness and TTV of the Si wafers
To measure the shunt resistance
To check the surface morphology after texturing process, Measure the finger width and height of the cell
ARC thickness and refractive Index measurement
To perform the screen inspection and cell Inspection
To measure the concentration of chemical bath
To mix the Ag conductor paste
Hardness characterization for printing squeeze
Simulation of firing setting for specific paste material
At Jupiter , we ensure that the systems followed and the materials used, are amongst the best. Whether it is using best-in-class manufacturing capabilities or sourcing materials from internationally well-known suppliers, every detail is minutely worked out. And thus, we are proud to have numerous certifications in our name.